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HERA: the Haverford Educational RISC Architecture

HERA, the Haverford Educational RISC Architecture, is a single architecture that can span the needs of a wide variety of upper-level undergraduate applied CS courses. It is powerful enough to introduce assembly language programming in Principles of Programming Languages and serve as a target for compilers in Compiler Design, yet simple enough to be built as a student project in Principles of Computer Organization (using, for example, the LogiSim or tkgate simulator). It has been used to support hardware/software co-design labs in our course on Operating Systems.

The use of a single simplified architecture and a familiar development environment minimizes the overhead of introducing new architectures or simulation tools, giving us more time to focus on the material we want to discuss. Students also seem to find a certain satisfaction from building, in their undergraduate courses, an entire system from the level of single-bit AND, OR, and NOT gates up through a high-level language. The HERA system was presented (by Dave W) in a poster session (not reviewed) at SIGCSE '05 and a paper (reviewed) at CCSCE '06; more details about the educational uses of HERA can be found in the CCSCE paper.

The specification of HERA version 2.3.3 is available in either Full detail or as a Quick Reference; A printed copy can be purchased purchased as a paperback book (the quick reference is printed in a small font on the back cover) from Version 2.3 of the specification meets the needs of our current courses, and thus I expect future revisions to consist of minor clarifications to the documentation, and bug fixes for tools (the HERA-C simulator, the standard library for tiger, and the Hassem assembler). There is also an online list of updates and errata describing various older versions.

The HERA-C simulator is designed to make most features of HERA assembly language available in a standard C or C++ development environment. It consists of a collection of macros that are named after HERA instructions, so that a HERA program can be compiled and debugged in a C/C++ environment, like this. Version 2.3 is available here.

The "Hassem" assembler is currently in "beta-test" stage and can be obtained by email request to Dave W.

I would like to thank all the students who worked with earlier version of this system for their patience, and especially Todd Miller (HC '01) for his work on HERA-C. The documentation for Version 2 of HERA was written with TeXmacs.

Documents describing the Version 1.0 HERA processor (developed and used from 2000 through the spring of 2003) are still available in postscript, PDF, and badly-formatted HTML. This web page, and the HERA specification and tools, are maintained by Dave W.

Related Work
A much simpler student-buildable computer is described in Chapters 4 and 5 of Nisan and Schocken's The Elements of Computing Systems: Building a Modern Computer from First Principles (MIT Press, 2005, apparently out of print but downloadable via the link above). The full textbook covers material about programming languages and operating systems as well as hardware/architecture, perhaps a one-semester analog of our use of HERA across four semesters. My quick glance at this material suggests that the processor design is much simpler and based on register/memory operations rather than register/register; this simplicity allows one-book treatment of more topics and also allows implementation on novel hardware technologies.

Pratt & Patel's LC-3 system also provides a simpler design that allows one-book (and one-semester) treatment of topics that Haverford covers in multiple courses. It is also somewhat less closely related to modern RISC design than is HERA.

Haverford College Page maintained by John Dougherty, David Wonnacott, and Rachel Heaton.
Computer Science Department, Haverford College.